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When both the inputs of edge – Triggered J-K Flip-Flop are set to Logic Zero?
a) The Flop-Flop is triggered
b) Q=0 AND Q"=1
c) Q=1 AND Q'=0
d) The output of Flip-Flop remains unchanged

c

To the value stored 4-Bit left shift was “1” what will be the blue of register after three clock pulses?
a) 2        
b) 4                        
c) 6                        
d) 8

d

Sum term (Max term) is implemented using……….gates?
a) OR                                    
b) AND
c) NOT                                  
d) OR-AND

a

In designing any counter the transition from a current state to the next sate is determined by?
a) Current state and inputs             
b) Only inputs
c) Only current state
d) current state and outputs

a

The 3-variable Karnaugh Map (K-Map) has……..cells for min or max terms?
a) 4        
b) 8                        
c) 12      
d) 16

b

Using multiplexer as parallel to serial converter requires connected to the multiplexer?
a) A parallel to serial converter circuit
b) A counter circuit
c) A BCD to Decimal decoder                          
d) A 2-to-8 bit decoder

a

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